DPDK  20.11.0
rte_eth_ctrl.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4 
5 #ifndef _RTE_ETH_CTRL_H_
6 #define _RTE_ETH_CTRL_H_
7 
8 #include <stdint.h>
9 #include <rte_common.h>
10 #include <rte_ether.h>
11 #include "rte_flow.h"
12 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
29 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001
30 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002
31 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004
32 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008
33 #define RTE_NTUPLE_FLAGS_PROTO 0x0010
34 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020
36 #define RTE_5TUPLE_FLAGS ( \
37  RTE_NTUPLE_FLAGS_DST_IP | \
38  RTE_NTUPLE_FLAGS_SRC_IP | \
39  RTE_NTUPLE_FLAGS_DST_PORT | \
40  RTE_NTUPLE_FLAGS_SRC_PORT | \
41  RTE_NTUPLE_FLAGS_PROTO)
42 
43 #define RTE_2TUPLE_FLAGS ( \
44  RTE_NTUPLE_FLAGS_DST_PORT | \
45  RTE_NTUPLE_FLAGS_PROTO)
46 
47 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F
54  uint16_t flags;
55  uint32_t dst_ip;
56  uint32_t dst_ip_mask;
57  uint32_t src_ip;
58  uint32_t src_ip_mask;
59  uint16_t dst_port;
60  uint16_t dst_port_mask;
61  uint16_t src_port;
62  uint16_t src_port_mask;
63  uint8_t proto;
64  uint8_t proto_mask;
68  uint8_t tcp_flags;
69  uint16_t priority;
71  uint16_t queue;
72 };
73 
74 #define RTE_ETH_FDIR_MAX_FLEXLEN 16
75 #define RTE_ETH_INSET_SIZE_MAX 128
81  RTE_ETH_INPUT_SET_UNKNOWN = 0,
82 
83  /* L2 */
84  RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
85  RTE_ETH_INPUT_SET_L2_DST_MAC,
86  RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
87  RTE_ETH_INPUT_SET_L2_INNER_VLAN,
88  RTE_ETH_INPUT_SET_L2_ETHERTYPE,
89 
90  /* L3 */
91  RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
92  RTE_ETH_INPUT_SET_L3_DST_IP4,
93  RTE_ETH_INPUT_SET_L3_SRC_IP6,
94  RTE_ETH_INPUT_SET_L3_DST_IP6,
95  RTE_ETH_INPUT_SET_L3_IP4_TOS,
96  RTE_ETH_INPUT_SET_L3_IP4_PROTO,
97  RTE_ETH_INPUT_SET_L3_IP6_TC,
98  RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
99  RTE_ETH_INPUT_SET_L3_IP4_TTL,
100  RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
101 
102  /* L4 */
103  RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
104  RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
105  RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
106  RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
107  RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
108  RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
109  RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
110 
111  /* Tunnel */
112  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
113  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
114  RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
115  RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
116  RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
117 
118  /* Flexible Payload */
119  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
120  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
121  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
122  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
123  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
124  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
125  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
126  RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
127 
128  RTE_ETH_INPUT_SET_DEFAULT = 65533,
129  RTE_ETH_INPUT_SET_NONE = 65534,
130  RTE_ETH_INPUT_SET_MAX = 65535,
131 };
132 
137  RTE_ETH_INPUT_SET_OP_UNKNOWN,
140  RTE_ETH_INPUT_SET_OP_MAX
141 };
142 
143 
149  uint16_t flow_type;
150  uint16_t inset_size;
152  enum rte_filter_input_set_op op;
153 };
154 
159  uint16_t ether_type;
160 };
161 
166  uint32_t src_ip;
167  uint32_t dst_ip;
168  uint8_t tos;
169  uint8_t ttl;
170  uint8_t proto;
171 };
172 
177  struct rte_eth_ipv4_flow ip;
178  uint16_t src_port;
179  uint16_t dst_port;
180 };
181 
186  struct rte_eth_ipv4_flow ip;
187  uint16_t src_port;
188  uint16_t dst_port;
189 };
190 
195  struct rte_eth_ipv4_flow ip;
196  uint16_t src_port;
197  uint16_t dst_port;
198  uint32_t verify_tag;
199 };
200 
205  uint32_t src_ip[4];
206  uint32_t dst_ip[4];
207  uint8_t tc;
208  uint8_t proto;
209  uint8_t hop_limits;
210 };
211 
216  struct rte_eth_ipv6_flow ip;
217  uint16_t src_port;
218  uint16_t dst_port;
219 };
220 
225  struct rte_eth_ipv6_flow ip;
226  uint16_t src_port;
227  uint16_t dst_port;
228 };
229 
234  struct rte_eth_ipv6_flow ip;
235  uint16_t src_port;
236  uint16_t dst_port;
237  uint32_t verify_tag;
238 };
239 
244  struct rte_ether_addr mac_addr;
245 };
246 
251  RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
252  RTE_FDIR_TUNNEL_TYPE_NVGRE,
253  RTE_FDIR_TUNNEL_TYPE_VXLAN,
254 };
255 
263  uint32_t tunnel_id;
264  struct rte_ether_addr mac_addr;
265 };
266 
272  struct rte_eth_l2_flow l2_flow;
273  struct rte_eth_udpv4_flow udp4_flow;
274  struct rte_eth_tcpv4_flow tcp4_flow;
275  struct rte_eth_sctpv4_flow sctp4_flow;
276  struct rte_eth_ipv4_flow ip4_flow;
277  struct rte_eth_udpv6_flow udp6_flow;
278  struct rte_eth_tcpv6_flow tcp6_flow;
279  struct rte_eth_sctpv6_flow sctp6_flow;
280  struct rte_eth_ipv6_flow ipv6_flow;
281  struct rte_eth_mac_vlan_flow mac_vlan_flow;
282  struct rte_eth_tunnel_flow tunnel_flow;
283 };
284 
289  uint16_t vlan_tci;
292  uint8_t is_vf;
293  uint16_t dst_id;
294 };
295 
300  uint16_t flow_type;
301  union rte_eth_fdir_flow flow;
305 };
306 
311  RTE_ETH_FDIR_ACCEPT = 0,
312  RTE_ETH_FDIR_REJECT,
313  RTE_ETH_FDIR_PASSTHRU,
314 };
315 
325 };
326 
331  uint16_t rx_queue;
334  uint8_t flex_off;
338 };
339 
344  uint32_t soft_id;
346  struct rte_eth_fdir_input input;
347  struct rte_eth_fdir_action action;
348 };
349 
355  uint16_t vlan_tci_mask;
361  uint16_t src_port_mask;
363  uint16_t dst_port_mask;
368  uint32_t tunnel_id_mask;
371 };
372 
377  RTE_ETH_PAYLOAD_UNKNOWN = 0,
378  RTE_ETH_RAW_PAYLOAD,
379  RTE_ETH_L2_PAYLOAD,
380  RTE_ETH_L3_PAYLOAD,
381  RTE_ETH_L4_PAYLOAD,
382  RTE_ETH_PAYLOAD_MAX = 8,
383 };
384 
396 };
397 
403  uint16_t flow_type;
406 };
407 
413  uint16_t nb_payloads;
414  uint16_t nb_flexmasks;
415  struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
417  struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
419 };
420 
430 };
431 
432 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t))
433 #define RTE_FLOW_MASK_ARRAY_SIZE \
434  (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
435 
444  enum rte_fdir_mode mode;
445  struct rte_eth_fdir_masks mask;
448  uint32_t guarant_spc;
449  uint32_t best_spc;
451  uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
452  uint32_t max_flexpayload;
468 };
469 
475  uint32_t collision;
476  uint32_t free;
477  uint32_t maxhash;
480  uint32_t maxlen;
481  uint64_t add;
482  uint64_t remove;
483  uint64_t f_add;
484  uint64_t f_remove;
485  uint32_t guarant_cnt;
486  uint32_t best_cnt;
487 };
488 
489 #ifdef __cplusplus
490 }
491 #endif
492 
493 #endif /* _RTE_ETH_CTRL_H_ */
#define RTE_ETH_INSET_SIZE_MAX
Definition: rte_eth_ctrl.h:75
rte_eth_fdir_behavior
Definition: rte_eth_ctrl.h:310
rte_eth_fdir_tunnel_type
Definition: rte_eth_ctrl.h:250
rte_eth_input_set_field
Definition: rte_eth_ctrl.h:80
rte_eth_fdir_status
Definition: rte_eth_ctrl.h:320
@ RTE_ETH_FDIR_NO_REPORT_STATUS
Definition: rte_eth_ctrl.h:321
@ RTE_ETH_FDIR_REPORT_ID_FLEX_4
Definition: rte_eth_ctrl.h:323
@ RTE_ETH_FDIR_REPORT_FLEX_8
Definition: rte_eth_ctrl.h:324
@ RTE_ETH_FDIR_REPORT_ID
Definition: rte_eth_ctrl.h:322
rte_fdir_mode
Definition: rte_eth_ctrl.h:424
@ RTE_FDIR_MODE_NONE
Definition: rte_eth_ctrl.h:425
@ RTE_FDIR_MODE_PERFECT
Definition: rte_eth_ctrl.h:427
@ RTE_FDIR_MODE_SIGNATURE
Definition: rte_eth_ctrl.h:426
@ RTE_FDIR_MODE_PERFECT_TUNNEL
Definition: rte_eth_ctrl.h:429
@ RTE_FDIR_MODE_PERFECT_MAC_VLAN
Definition: rte_eth_ctrl.h:428
rte_filter_input_set_op
Definition: rte_eth_ctrl.h:136
@ RTE_ETH_INPUT_SET_SELECT
Definition: rte_eth_ctrl.h:138
@ RTE_ETH_INPUT_SET_ADD
Definition: rte_eth_ctrl.h:139
rte_eth_payload_type
Definition: rte_eth_ctrl.h:376
#define RTE_ETH_FDIR_MAX_FLEXLEN
Definition: rte_eth_ctrl.h:74
enum rte_eth_fdir_status report_status
Definition: rte_eth_ctrl.h:333
enum rte_eth_fdir_behavior behavior
Definition: rte_eth_ctrl.h:332
struct rte_eth_fdir_input input
Definition: rte_eth_ctrl.h:346
struct rte_eth_fdir_action action
Definition: rte_eth_ctrl.h:347
struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]
Definition: rte_eth_ctrl.h:415
struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]
Definition: rte_eth_ctrl.h:417
uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:404
uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:290
uint32_t guarant_spc
Definition: rte_eth_ctrl.h:448
uint32_t flex_payload_unit
Definition: rte_eth_ctrl.h:455
uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]
Definition: rte_eth_ctrl.h:451
uint32_t max_flex_bitmask_num
Definition: rte_eth_ctrl.h:467
uint32_t flex_bitmask_unit
Definition: rte_eth_ctrl.h:465
uint32_t max_flexpayload
Definition: rte_eth_ctrl.h:452
struct rte_eth_fdir_flex_conf flex_conf
Definition: rte_eth_ctrl.h:447
uint16_t flex_payload_limit
Definition: rte_eth_ctrl.h:462
enum rte_fdir_mode mode
Definition: rte_eth_ctrl.h:444
uint32_t max_flex_payload_segment_num
Definition: rte_eth_ctrl.h:458
struct rte_eth_fdir_flow_ext flow_ext
Definition: rte_eth_ctrl.h:303
union rte_eth_fdir_flow flow
Definition: rte_eth_ctrl.h:301
uint16_t vlan_tci_mask
Definition: rte_eth_ctrl.h:355
uint8_t mac_addr_byte_mask
Definition: rte_eth_ctrl.h:366
uint16_t src_port_mask
Definition: rte_eth_ctrl.h:361
uint32_t tunnel_id_mask
Definition: rte_eth_ctrl.h:368
uint8_t tunnel_type_mask
Definition: rte_eth_ctrl.h:369
struct rte_eth_ipv6_flow ipv6_mask
Definition: rte_eth_ctrl.h:359
struct rte_eth_ipv4_flow ipv4_mask
Definition: rte_eth_ctrl.h:357
uint16_t dst_port_mask
Definition: rte_eth_ctrl.h:363
enum rte_eth_payload_type type
Definition: rte_eth_ctrl.h:390
uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]
Definition: rte_eth_ctrl.h:391
uint32_t dst_ip[4]
Definition: rte_eth_ctrl.h:206
uint32_t src_ip[4]
Definition: rte_eth_ctrl.h:205
uint16_t ether_type
Definition: rte_eth_ctrl.h:159
struct rte_ether_addr mac_addr
Definition: rte_eth_ctrl.h:244
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:195
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:234
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:186
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:225
struct rte_ether_addr mac_addr
Definition: rte_eth_ctrl.h:264
enum rte_eth_fdir_tunnel_type tunnel_type
Definition: rte_eth_ctrl.h:261
struct rte_eth_ipv4_flow ip
Definition: rte_eth_ctrl.h:177
struct rte_eth_ipv6_flow ip
Definition: rte_eth_ctrl.h:216