5 #ifndef _RTE_ETH_CTRL_H_
6 #define _RTE_ETH_CTRL_H_
30 RTE_ETH_FILTER_NONE = 0,
31 RTE_ETH_FILTER_MACVLAN,
32 RTE_ETH_FILTER_ETHERTYPE,
33 RTE_ETH_FILTER_FLEXIBLE,
35 RTE_ETH_FILTER_NTUPLE,
36 RTE_ETH_FILTER_TUNNEL,
39 RTE_ETH_FILTER_L2_TUNNEL,
40 RTE_ETH_FILTER_GENERIC,
86 #define RTE_ETHTYPE_FLAGS_MAC 0x0001
87 #define RTE_ETHTYPE_FLAGS_DROP 0x0002
94 struct rte_eth_ethertype_filter {
101 #define RTE_FLEX_FILTER_MAXLEN 128
102 #define RTE_FLEX_FILTER_MASK_SIZE \
103 (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
135 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001
136 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002
137 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004
138 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008
139 #define RTE_NTUPLE_FLAGS_PROTO 0x0010
140 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020
142 #define RTE_5TUPLE_FLAGS ( \
143 RTE_NTUPLE_FLAGS_DST_IP | \
144 RTE_NTUPLE_FLAGS_SRC_IP | \
145 RTE_NTUPLE_FLAGS_DST_PORT | \
146 RTE_NTUPLE_FLAGS_SRC_PORT | \
147 RTE_NTUPLE_FLAGS_PROTO)
149 #define RTE_2TUPLE_FLAGS ( \
150 RTE_NTUPLE_FLAGS_DST_PORT | \
151 RTE_NTUPLE_FLAGS_PROTO)
153 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F
160 struct rte_eth_ntuple_filter {
184 #define ETH_TUNNEL_FILTER_OMAC 0x01
185 #define ETH_TUNNEL_FILTER_OIP 0x02
186 #define ETH_TUNNEL_FILTER_TENID 0x04
187 #define ETH_TUNNEL_FILTER_IMAC 0x08
188 #define ETH_TUNNEL_FILTER_IVLAN 0x10
189 #define ETH_TUNNEL_FILTER_IIP 0x20
191 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
192 ETH_TUNNEL_FILTER_IVLAN)
193 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
194 ETH_TUNNEL_FILTER_IVLAN | \
195 ETH_TUNNEL_FILTER_TENID)
196 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
197 ETH_TUNNEL_FILTER_TENID)
198 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
199 ETH_TUNNEL_FILTER_TENID | \
200 ETH_TUNNEL_FILTER_IMAC)
236 RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
237 RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
238 RTE_ETH_GLOBAL_CFG_TYPE_MAX,
252 #define RTE_ETH_FDIR_MAX_FLEXLEN 16
253 #define RTE_ETH_INSET_SIZE_MAX 128
258 enum rte_eth_input_set_field {
259 RTE_ETH_INPUT_SET_UNKNOWN = 0,
262 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
263 RTE_ETH_INPUT_SET_L2_DST_MAC,
264 RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
265 RTE_ETH_INPUT_SET_L2_INNER_VLAN,
266 RTE_ETH_INPUT_SET_L2_ETHERTYPE,
269 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
270 RTE_ETH_INPUT_SET_L3_DST_IP4,
271 RTE_ETH_INPUT_SET_L3_SRC_IP6,
272 RTE_ETH_INPUT_SET_L3_DST_IP6,
273 RTE_ETH_INPUT_SET_L3_IP4_TOS,
274 RTE_ETH_INPUT_SET_L3_IP4_PROTO,
275 RTE_ETH_INPUT_SET_L3_IP6_TC,
276 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
277 RTE_ETH_INPUT_SET_L3_IP4_TTL,
278 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
281 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
282 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
283 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
284 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
285 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
286 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
287 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
290 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
291 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
292 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
293 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
294 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
297 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
298 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
299 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
300 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
301 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
302 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
303 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
304 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
306 RTE_ETH_INPUT_SET_DEFAULT = 65533,
307 RTE_ETH_INPUT_SET_NONE = 65534,
308 RTE_ETH_INPUT_SET_MAX = 65535,
315 RTE_ETH_INPUT_SET_OP_UNKNOWN,
318 RTE_ETH_INPUT_SET_OP_MAX
429 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
430 RTE_FDIR_TUNNEL_TYPE_NVGRE,
431 RTE_FDIR_TUNNEL_TYPE_VXLAN,
489 RTE_ETH_FDIR_ACCEPT = 0,
491 RTE_ETH_FDIR_PASSTHRU,
557 RTE_ETH_PAYLOAD_UNKNOWN = 0,
562 RTE_ETH_PAYLOAD_MAX = 8,
612 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t))
613 #define RTE_FLOW_MASK_ARRAY_SIZE \
614 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
673 RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
676 RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
703 RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
710 RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
713 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
714 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)